This register stores the ECC of the first occurrence of an access with an uncorrectable error. When the UE_STATUS bit in the ECC Status Register is cleared, this register is re-enabled to store the ECC of the next uncorrectable error. Storing of the failing ECC is enabled after reset.
The register is implemented if C_UE_FAILING_REGISTERS is set to 1.
| Reserved | UE_FFE | ||
|---|---|---|---|
| 31 | 7 or 6 | 0 | |
| Bit(s) | Name | Core Access | Reset Value | Description |
|---|---|---|---|---|
| 7:0 or 6:0 | UE_FFE | R | 0 | ECC of the first occurrence of an uncorrectable error. UE_FFE is eight bits with 64-bit data width and seven bits with 32-bit data width. |