The simulation debug flow for the Mentor Graphics QuestaSimulator (QuestaSim) is described below. A similar approach can be used with other simulators.
- Check for the latest supported versions of QuestaSim in the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973). Is this version being used? If not, update to this version.
- If using Verilog, do you have a mixed mode simulation license? If not, obtain a mixed-mode license.
- Ensure that the proper libraries are compiled and mapped. In the Vivado Design Suite, this can be done using Flow > Simulation Settings.
- Have you associated the intended software program for the
MicroBlaze processor with the simulation? Use the command
Tools > AssociateELF Files in the Vivado Design Suite. - When observing the traffic on the LMB interface connected to the LMB Block RAM I/F Controller, see the MicroBlaze Processor Reference Guide (UG984) for the LMB timing.