References - References - 4.0 English - PG112

LMB Block RAM Interface Controller LogiCORE IP Product Guide (PG112)

Document ID
PG112
Release Date
2025-11-20
Version
4.0 English

These documents provide supplemental material useful with this guide:

  1. MicroBlaze Processor Reference Guide (UG984)
  2. Arm AMBA AXI4-Lite Protocol Specification ARM IHI 0022E (registration required)
  3. Application Note, Single Error Correction and Double Error Detection (XAPP645)
  4. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
  5. Vivado Design Suite User Guide: Designing with IP (UG896)
  6. Vivado Design Suite User Guide: Getting Started (UG910)
  7. Vivado Design Suite User Guide: Logic Simulation (UG900)
  8. Block Memory Generator LogiCORE IP Product Guide (PG058)
  9. Enbedded Memory Generator IP Product Guide (PG326)
  10. ISE to Vivado Design Suite Migration Guide (UG911)
  11. Vivado Design Suite User Guide: Programming and Debugging (UG908)
  12. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
  13. MicroBlaze V Processor Reference Guide (UG1629)