Parameter Values - Parameter Values - 4.0 English

To obtain an LMB Block RAM Interface Controller that is uniquely tailored as a specific system, certain features can be parameterized in the LMB Block RAM Interface Controller design. This enables you to configure a design that only uses the resources required by the system and operates with the best possible performance. The features that can be parameterized in AMD LMB Block RAM Interface Controller designs are shown in the following table.

Table 1. LMB Block RAM Interface Controller Parameters
Parameter Name	Feature/Description	Allowable Values	Default Value	VHDL Type
Basic Parameters
C_NUM_LMB	Number of LMB Ports	1-8	1	integer
C_ARBITRATION	LMB Arbitration	0=STATIC_PRIORITY 1=ROUND_ROBIN	0	integer
C_WRITE_ACCESS ⁴	LMB access types	0=No LMB write 1=Only 32-bit word write 2=8-, 16- and 32 bit writes	2	integer
C_BASEADDR	LMB Block RAM Base Address	Valid Address Range ²	None¹	std_logic_vector
C_HIGHADDR	LMB Block RAM HIGH Address	Valid Address Range ²	None¹	std_logic_vector
C_MASK	LMB Decode Mask	Valid decode mask for SLMB³	0x0000000000800000	std_logic_vector
C_MASK1	LMB Decode Mask	Valid decode mask for SLMB1³	0x0000000000800000	std_logic_vector
C_MASK2	LMB Decode Mask	Valid decode mask for SLMB2³	0x0000000000800000	std_logic_vector
C_MASK3	LMB Decode Mask	Valid decode mask for SLMB3³	0x0000000000800000	std_logic_vector
C_MASK4	LMB Decode Mask	Valid decode mask for SLMB4³	0x0000000000800000	std_logic_vector
C_MASK5	LMB Decode Mask	Valid decode mask for SLMB5³	0x0000000000800000	std_logic_vector
C_MASK6	LMB Decode Mask	Valid decode mask for SLMB6³	0x0000000000800000	std_logic_vector
C_MASK7	LMB Decode Mask	Valid decode mask for SLMB7³	0x0000000000800000	std_logic_vector
C_PROT_CFG	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG1	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG2	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG3	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG4	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG5	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG6	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
C_PROT_CFG7	LMB Protection Configuration	0x00 - 0xFF	0xFF	std_logic_vector
ECC Parameters
C_ECC	Implement Error Correction and Detection	0=No ECC 1=ECC	0	integer
C_INTERCONNECT ⁴	Select type of register access interface	0=No interface 2=AXI4-Lite	0	integer
C_FAULT_INJECT ⁴	Implement Fault Injection registers	0=No fault inject register 1=Fault inject registers	0	integer
C_CE_FAILING_REGISTERS ⁴	Implement First Failing Address, Data and ECC registers for correctable error	0=No CE failing registers 1=CE failing registers	0	integer
C_UE_FAILING_REGISTERS ⁴	Implement First Failing Address, Data and ECC registers for uncorrectable error	0=No UE failing registers 1=UE failing registers	0	integer
C_ECC_STATUS_REGISTERS ⁴	Implement status and interrupt registers	0=Interrupt not generated and no status register 1=Interrupt available and status register	0	integer
C_ECC_ONOFF_REGISTER ⁴	Implement register to enable/disable ECC checking	0=ECC checking is always enabled 1=ECC checking is controlled by the value in this register	0	integer
C_ECC_ONOFF_RESET_VALUE⁴	Selects reset value for ECC On/Off Register	0=ECC On/Off Register is initialized to 0 at reset 1= ECC On/Off Register is initialized to 1 at reset	1	integer
C_CE_COUNTER_WIDTH ⁴	Correctable Error Counter width	0=No CE Counter 1-31=Width of CE Counter	0	integer
No default value is specified for BASEADDR and HIGHADDR to ensure that the actual value is set. If the value is not set, a compiler error is generated. These generics must be a power of 2. BASEADDR must be a multiple of the range, where the range is HIGHADDR - BASEADDR +1. The range specified by BASEADDR and HIGHADDR must comprised of a complete, contiguous power-of-two range, such that range = 2n, and the n least significant bits of BASEADDR must be zero. The decode mask determines which bits are used by the LMB decode logic to decode a valid access to LMB. Parameter value is not considered unless parameter C_ECC = 1.

Parameter Values - Parameter Values - 4.0 English - PG112

LMB Block RAM Interface Controller LogiCORE IP Product Guide (PG112)