The width of many of the LMB block RAM Interface Controller signals depends on the number of memories in the system and the width of the various data and address buses. The dependencies between the LMB block RAM Interface Controller design parameters and I/O signals are shown in the following table.
| Parameter Name | Ports (Port width depends on parameter) |
|---|---|
| C_ECC | BRAM_WEN_A, BRAM_Din_A, BRAM_Dout_A |