Introduction - Introduction - 4.0 English - PG112

LMB Block RAM Interface Controller LogiCORE IP Product Guide (PG112)

Document ID
PG112
Release Date
2025-11-20
Version
4.0 English

This document provides the design specification for the AMD LogiCORE™ IP Local Memory Bus (LMB) Block RAM Interface Controller core. The LMB Block RAM Interface Controller core connects to an lmb_v10 bus.

Version v4.0 of the LMB Block RAM Interface Controller core requires MicroBlaze™ v9.0 or higher and lmb_v10 v3.0 or higher.