Fault Injection ECC Register (FI_ECC) - Fault Injection ECC Register (FI_ECC) - 4.0 English - PG112

LMB Block RAM Interface Controller LogiCORE IP Product Guide (PG112)
Document ID
PG112
Release Date
2025-11-20
Version
4.0 English

This register is used to inject errors in the generated ECC written to the on-chip RAM and can be used to test the error correction and error signaling. The bits set in the register toggle the corresponding ECC bits of the next data written to on-chip RAM. After the fault has been injected, the Fault Injection ECC Register is cleared automatically.

The register is implemented if C_FAULT_INJECT is set to 1.

Note: Injecting faults should be performed in a critical region in software, that is, writing to this register and the subsequent write to LMB block RAM must not be interrupted.
Table 1. Fault Injection ECC Register (FI_ECC)
Reserved FI_ECC
31   7 or 6 0
Table 2. Fault Injection ECC Register Bit Definitions
Bit(s) Name Core Access Reset Value Description
7:0 or 6:0 FI_ECC W 0 Bit positions set to one toggle the corresponding bit of the next ECC written to the LMB block RAM. The register is automatically cleared after the fault has been injected. FI_ECC is eight bits with 64-bit data width and seven bits with 32-bit data width.