This register determines if the ECC checking should be enabled. ECC checking should normally never be disabled. However, in the case where the on-chip RAM ECC bits have not been initialized at startup, they must be manually initialized before enabling the ECC checking. The ECC initialization is done by performing a read followed by a write on the whole on-chip RAM contents.
The register is implemented if C_ECC_ONOFF_REGISTER is set to 1.
| Reserved | ECC_ONOFF | ||
|---|---|---|---|
| 31 | 1 | 0 | |
| Bit(s) | Name | Core Access | Reset Value | Description |
|---|---|---|---|---|
| 0 | ECC_ONOFF | R/W | C_ECC_ONOFF_RESET_VALUE |
If 1 ECC checking is enabled. If 0 ECC checking is disabled. |