Revision History - Revision History - 9.1 English - PG109

Fast Fourier Transform LogiCORE IP Product Guide (PG109)

Document ID
PG109
Release Date
2025-12-17
Version
9.1 English

The following table shows the revision history for this document.

Section Revision Summary
12/17/2025 Version 9.1
Features Updated SSR rates.
IP Facts Updated supported simulators.
Feature Support Matrix Added topic.
Configuration Tab Updated parameter descriptions.
Implementation Tab Updated parameter descriptions.
Detailed Implementation Tab Updated parameter descriptions.
Create a State Structure Updated table descriptions for SSR support.
Installing and Running the MEX Function Updated table descriptions for SSR support.
06/11/2025 Version 9.1
Features Updated SSR description.
Core Overview Added SSR description.
For Single-channel and SSR Updated figure.
For Single-channel and SSR Updated figure.
Rounding Implementation Added SSR description.
Bit and Digit Reversal Added SSR description.
Transform Size Added SSR note.
Forward/Inverse and Scaling Schedule Added SSR note.
Pipelined Streaming I/O Architecture Added SSR note.
Blocking Runtime Configuration Added section.
Fixed-Point Data Added SSR note.
Configuring the FFT Updated description.
Configuration Tab Updated SSR description.
Implementation Tab Updated SSR description.
Detailed Implementation Tab Updated SSR description.
Create a State Structure Updated C_NSSR and C_SYSTOLICFFT_INV rows.
Installing and Running the MEX Function Added generics.C_NSSR and updated generics.C_SYSTOLICFFT_INV.
Demonstration Test Bench Added SSR note description.
11/13/2024 Version 9.1
Features Updated this section.
IP Facts Updated this section.
Core Overview Updated this section.
TDATA Example Updated this section.
TDATA Example Updated this section.
Floating-Point Considerations Updated this section.
Configuration Tab Updated this section.
Implementation Tab Updated this section.
Design Flow Steps Removed the section System Generator for DSP Graphical User Interface.
Create a State Structure Updated this section.
Installing and Running the MEX Function Updated this section.
References Updated this section.
05/30/2024 Version 9.1
Entire document Support native Floating-Point and Super Sample Rate
05/04/2022 Version 9.1
Unpacking and Model Contents Information added for the c model.
08/06/2021 Version 9.1
Configuration Channel Updated TDATA Format information.
TDATA Fields Updated SCALE_SCH field name.
01/21/2021 Version 9.1
N/A Added Versal adaptive SoC support.
06/17/2020 Version 9.1
Applying a New Configuration While Idle
  • Updated the configuration data paragraph.
  • Removed libgmpxx.so.4.
05/22/2019 Version 9.1
Algorithm Minor changes.
Transform Status Minor changes.
04/04/2018 Version 9.1
N/A Version change only.
10/04/2017 Version 9.0
N/A Added scaling factor information.
11/18/2015 Version 9.0
N/A AMD UltraScale+™ device support added.
09/30/2015 Version 9.0
N/A Updated C model chapter to include details of MPIR libraries required by latest C model enhancements.
06/24/2015 Version 9.0
N/A C Model supported software updated.
04/01/2015 Version 9.0
N/A
  • Removed 32-bit support for the C model.
  • Clarified the compiler support for the C model.
10/01/2014 Version 9.0
N/A Updated document to correct cross-reference error and clarify Resets information.
04/02/2014 Version 9.0
N/A
12/18/2013 Version 9.0
N/A Added AMD UltraScale™ architecture support.
10/02/2013 Version 9.0
N/A
  • Revision number advanced to 9.0 to align with core version number 9.0.
  • C Model updates.
03/20/2013 Version 1.0
N/A Initial release as a Product Guide; replaces DS808 and UG459. No other documentation changes.