The conversion to AXI4-Stream interfaces brings standardization and enhances interoperability of AMD IP LogiCORE solutions. Other
than general control signals such as aclk, aclken, and aresetn, and event
signals, all inputs and outputs to the core are conveyed on AXI4-Stream channels. A channel always consists of TVALID and
TDATA plus additional ports (such as TREADY,
TUSER, and TLAST) when required and optional fields.
Together, TVALID and TREADY perform a handshake to transfer
a message, where the payload is TDATA, TUSER, and
TLAST. The core operates on the operands contained in the
TDATA fields and outputs the result in the TDATA field of
the output channel.
For further details on AXI4-Stream Interfaces see the AMBA® AXI4-Stream Protocol Specification (ARM IHI 0051A) and the Vivado Design Suite: AXI Reference Guide (UG1037).