Test Bench - 6.0 English - PG104

Complex Multiplier LogiCORE IP Product Guide (PG104)

Document ID
PG104
Release Date
2024-11-26
Version
6.0 English

This chapter contains information about the test bench provided in the AMD Vivado™ Design Suite.

When the core is generated using the Vivado Design Suite, a demonstration test bench is created. This is a simple VHDL test bench that exercises the core.

The demonstration test bench source code is one VHDL file: demo_tb/tb_<component_name>.vhd in the Vivado output directory. The source code is comprehensively commented.