Resets - 6.0 English - PG104

Complex Multiplier LogiCORE IP Product Guide (PG104)

Document ID
PG104
Release Date
2024-11-26
Version
6.0 English

The Floating-Point Operator core uses a single, optional, reset input called aresetn. This signal is active-Low and must be asserted for a minimum of two clock cycles to ensure correct operation. aresetn is a global synchronous reset which resets all control states in the core; all data in transit through the core is lost when aresetn is asserted.