Dedicated Primitive Solution - 6.0 English - PG104

Complex Multiplier LogiCORE IP Product Guide (PG104)

Document ID
PG104
Release Date
2024-11-26
Version
6.0 English

Devices such as AMD Versalâ„¢ have a dedicated DSPCPLX primitive capable of performing a full complex multiplication using the equivalent of two DSP slices. This solution uses fewer resources and has lower latency than either the 3- or 4-multiplier solution. No special selection is required; the system uses this solution automatically when the configuration allows.

Similarly, multiple DSPFP32 primitives can be combined together to perform floating point complex multiplication. This mode requires the selection of the Floating Point option for the Data Type.

You can set a specific latency value: set Latency Configuration to Manual and then set the Minimum Latency value accordingly. This allows you to specify adjust for some situations when you might want a higher latency value than what the automatic latency allocation provides:

  • For backwards compatibility
  • For very high performance. (Using a higher latency value adds faster programmable logic registers before input and after the output stages.)