AXI4-Stream Considerations - 6.0 English - PG104

Complex Multiplier LogiCORE IP Product Guide (PG104)

Document ID
PG104
Release Date
2024-11-26
Version
6.0 English

The conversion to AXI4-Stream interfaces brings standardization and enhances interoperability of IP AMD LogiCOREā„¢ solutions. Other than general control signals such as aclk, aclken and aresetn, all inputs and outputs to the Complex Multiplier are conveyed using AXI4-Stream channels. A channel consists of TVALID and TDATA always, plus several optional ports and fields. In the Complex Multiplier, the optional ports supported are TREADY, TLAST and TUSER. Together, TVALID and TREADY perform a handshake to transfer a message, where the payload is TDATA, TUSER and TLAST. The Complex Multiplier operates on the operands contained in the TDATA fields and outputs the result in the TDATA field of the output channel. The Complex Multiplier does not use TUSER and TLAST as such, but the core provides the facility to convey these fields with the same latency as for TDATA. This facility is intended to ease use of the Complex Multiplier in a system. For example, the Complex Multiplier can be used as a mixer or phase shift operating on streaming packetized data. In this example, the core could be configured pass the TLAST of the packetized data channel saving the system designer the effort of constructing a bypass path for this information.

For further details on AXI4-Stream interfaces see the Vivado Design Suite: AXI Reference Guide (UG1037) and the AMBA 4 AXI4-Stream Protocol Version: 1.0 Specification.