Video Test Pattern Generator core has only a hardware reset option - the AP_RST_N pin. No software reset option is available.
The external reset pulse needs to be held for 16 or more AP_CLK cycles
to reset the core.
The AP_RST_N signal is synchronous to the
AP_CLK clock domain.
The AP_RST_N signal resets the entire core
including the AXI4-Lite and AXI4-Stream interfaces.