TDATA Width (bytes) - 1.1 English

AXI Memory Mapped to Stream Mapper LogiCORE IP Product Guide (PG102)
Document ID
PG102
Release Date
2022-08-08
Version
1.1 English

• Description: Specifies the width in bytes of the TDATA signal on the M_AXIS and S_AXIS interfaces.

• Format/Range: Integer (1-512)

• Default Value: 1