Data Width - 1.1 English

AXI Memory Mapped to Stream Mapper LogiCORE IP Product Guide (PG102)
Document ID
PG102
Release Date
2022-08-08
Version
1.1 English

• Description: Width of all DATA signals for S_AXI and M_AXI interfaces.

• Format/Range: Integer (32, 64, 128, 256, 512, 1024)

• Default Value: 32