Example Design - Example Design - 2.0 English - PG092

ECC LogiCORE IP Product Guide (PG092)

Document_ID
PG092
Release_Date
2026-07-22
Version
2.0 English

This chapter contains information about the example design provided in the AMD Vivado™ Design Suite. The following figure shows the configuration of the example design.

Figure 1. Example Design Block Diagram

The example design contains the following:

  • An instance of the ECC core.
  • An instance of the ECC partner core in complementary mode
  • Clocking wizard to generate clock signals for the example design.