ECC Decoder Operation - ECC Decoder Operation - 2.0 English - PG092

ECC LogiCORE IP Product Guide (PG092)

Document_ID
PG092
Release_Date
2026-07-22
Version
2.0 English

The ECC decoder operation generates error correction syndrome bits for the input data and check bits. These syndrome bits are used to correct any single-bit errors, or to detect (but not correct) any double-bit errors in the input data. The single bit error corrected data, along with the ecc_sbit_err status or the uncorrected data with ecc_dbit_err status, are provided as an output of the ECC decoder function, as shown in the following figure. If no errors are detected, input data is forwarded at the output, and both ecc_sbit_err and ecc_dbit_err status outputs are kept deasserted.

The ECC decoder operations can also be bypassed by asserting the ecc_correct_n input. When the operations are bypassed, the input data is forwarded at the output, and both ecc_sbit_err and ecc_dbit_err status outputs are kept deasserted. The ECC bypass function can be applied when error protection/correction is not required for portions of data or payload provided to the ECC core.

Figure 1. ECC Decoder Block Diagram
FF FF XOR XOR XOR FF FF FF FF LUT LUT LUT FF Syndrome Calculation Error Mask Generation XOR Single Bit Correction FF ecc_clk ecc_clken ecc_reset ecc_chkbits_in ecc_data_in ecc_data_out ecc_sbit_err ecc_dbit_err ecc_correct_n X13070