The following table details the ECC core signals.
| Port Name | I/O | Description |
|---|---|---|
| ecc_data_in[C_DATA_WIDTH -1:0] | I | Data Input. For generating check bits or protection bits. The valid range for input data width is from 4 to 128 bits. |
| ecc_data_out[C_DATA_WIDTH -1:0] | O | Data Output. The valid range for output data width is from 4 to 128 bits.
|
| ecc_chkbits_in[C_CHK_BIT_WIDTH -1:0] | I | Input Check Bits. Applicable for decoder and encoder/decoder modes of
operation. The valid range for check bit width is from 4 to 9 bits. Refer to Table
4-1 for minimum number of check bits required for the configured data width.
|
| ecc_chkbits_out[C_CHK_BIT_WIDTH-1:0] | O | Output Check Bits/Syndrome. Encoder and Encoder/Decoder modes only. The valid
range for check bit width is from 4 to 9 bits. Refer to Table 4-1 for minimum number
of check bits required for the configured data width.
|
| ecc_correct_n | I | Disable Error Correction. Applicable for decoder and encoder/decoder mode of operation. When asserted High, suppresses single bit error correction in the data. |
| ecc_sbit_err | O | Single-Bit Error. Applicable for decoder and encoder/decoder modes of operation. When asserted High, flags the presence of a single-bit error in data which has been auto-corrected during ECC decoder operations. |
| ecc_dbit_err | O | Double-Bit Error. Applicable for decoder and encoder/decoder modes of operation. When asserted High, flags the presence of a double-bit error in data. |
| ecc_encode | I | Encoder Enable. Applicable for only encoder/decoder mode of operation. When asserted High, the core performs encoding operations. When ecc_encode is de-asserted, the core performs decoding and/or error correction operations. |