When using Vivado IP integrator, the Vivado IDE automatically computes the values of these parameters.
- TDATA width (bytes)
- This parameter specifies the width in bytes of the
TDATAsignal on all the AXI4-Stream interfaces. This parameter is an integer and can vary from 0 to 512. Set to 0 to omit theTDATAsignal. If theTDATAsignal is omitted, then theTKEEPandTSTRBsignals are also omitted. The width of the port is multiplied by 8 to get the width in bits. - Enable TSTRB
- If set to Yes, this parameters
specifies if the optional
TSTRBsignal is present on all the AXI4-Stream interfaces. This option can only be enabled if theTDATAWidth (bytes) parameter is greater than 0. - Enable TKEEP
- If set to Yes, this parameters
specifies if the optional
TKEEPsignal is present on all the AXI4-Stream interfaces. This option can only be enabled if theTDATAWidth (bytes) parameter is greater than 0. - Enable TLAST
- If set to Yes, this parameters
specifies if the optional
TLASTsignal is present on all the AXI4-Stream interfaces. - TID width (bits)
- If greater than 0, this parameter specifies if the optional
TIDsignal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly. - TDEST width (bits)
- If greater than 0, this parameter specifies if the optional
TDESTsignal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly. - TUSER Width (bits)
- If greater than 0, this parameter specifies if the optional
TUSERsignal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly.