MI_MUX[0-15] Register - 3.0 English - PG085

There is one MI_MUX register for each number of master interfaces ports in the design. Each MIx_MUX value controls slave interface selection. For example, MI4_MUX value of 0x1 would route slave interface 1 to master interface 4. The MIx_DISABLE value can be set to disable the master interface. Each slave interface can only be selected once. If more than 1 MIx_MUX value is set to the same slave interface, then the lower master interface wins control and the higher master interface(s) is disabled. MI0_MUX register is at address offset 0x40, MI1_MUX_register is at address offset 0x44, …, and MI15_MUX register is at address offset 0x7C.