If you are migrating from a 7 series GTX or GTH
device to an AMD UltraScale™
GTH device, the prefixes of the optional
transceiver debug ports for single-lane cores are changed from “gt0”,
“gt1” to “gt”, and the suffix
“_in” and “_out” are dropped. For multi-lane
cores, the prefixes of the optional transceiver debug ports gt(n) are aggregated into a
single port. For example: gt0_gtrxreset and
gt1_gtrxreset now become gt_gtrxreset [1:0]. This
is true for all ports, with the exception of the DRP buses which follow the convention
of gt(n)_drpxyz.
It is important to update your design to use the new transceiver debug port names. For more information about migration to UltraScale devices, see the UltraScale Architecture Migration: Methodology Guide (UG1026)