This programming sequence is provided for you to directly perform the read/write operations to the registers and this might not match with the example driver software that is provided along with this IP.
The following two tables illustrate a power-up read of the registers followed by a programming sequence for transmission and reception of a single packet in store-and-forward mode and cut-through mode using AXI4-Lite interface. See the register definitions for further information and options.
Register | Access | Value | Activity |
---|---|---|---|
Power-up/Reset Read of Register Values | |||
ISR | Read Word | 01D00000 | Read interrupt status register (indicates transmit reset complete and receive reset complete) |
ISR | Write Word | 0xFFFFFFFF | Write to clear reset done interrupt bits |
ISR | Read Word | 0x00000000 | Read interrupt status register |
IER | Read Word | 0x00000000 | Read interrupt enable register |
TDFV | Read Word | 0x000001FC | Read the transmit FIFO vacancy (for TX FIFO Depth of 512) |
RDFO | Read Word | 0x00000000 | Read the receive FIFO occupancy |
Transmit a Packet | |||
IER | Write Word | 0x0C000000 | Enable transmit complete and receive complete interrupts |
TDR | Write Word | 0x00000002 | Transmit Destination address (0x2 = destination device address is 2) |
TDFD | Write Word | 0xFFFFFFFF | 4 bytes of data |
TDFD | Write Word | 0x12345678 | 4 bytes of data |
TDFD | Write Word | 0x00010203 | 4 bytes of data |
TDFD | Write Word | 0x08090A0B | 4 bytes of data |
TDFD | Write Word | 0x10111213 | 4 bytes of data |
TDFD | Write Word | 0x18191A1B | 4 bytes of data |
TDFD | Write Word | 0x20212223 | 4 bytes of data |
TDFD | Write Word | 0x28292A2B | 4 bytes of data |
TDFV | Read Word | 0x000001F4 | Read the transmit FIFO vacancy |
TLR | Write Word | 0x00000020 | Transmit length (0x20 = 32bytes), this starts transmission |
ISR | Read Word | 0x08000000 | A typical value after TX Complete is indicated by interrupt |
ISR | Write Word | 0xFFFFFFFF | Write to clear transmit complete interrupt bits |
ISR | Read Word | 0x00000000 | Read interrupt status register |
TDFV | Read Word | 0x000001FC | Read the transmit FIFO vacancy |
Receive a Packet | |||
ISR | Read Word | 0x04000000 | A typical value after RX Complete is indicated by interrupt |
ISR | Write Word | 0xFFFFFFFF | Write to clear receive complete interrupt bits |
ISR | Read Word | 0x00000000 | Read interrupt status register |
RDFO | Read Word | 0x00000008 | Read the receive FIFO occupancy |
RLR | Read Word | 0x00000020 | Receive length (0x20 =32 bytes) indicates number of bytes to read |
RDR | Read Word | 0x00000002 | Receive Destination address (0x2 = destination device address is 2) |
RDFD | Read Word | 0x00000008 | Read the receive FIFO occupancy |
RDFD | Read Word | 0xFFFFFFFF | 4 bytes of data |
RDFD | Read Word | 0x12345678 | 4 bytes of data |
RDFD | Read Word | 0x00010203 | 4 bytes of data |
RDFD | Read Word | 0x08090A0B | 4 bytes of data |
RDFD | Read Word | 0x10111213 | 4 bytes of data |
RDFD | Read Word | 0x18191A1B | 4 bytes of data |
RDFD | Read Word | 0x20212223 | 4 bytes of data |
RDFD | Read Word | 0x28292A2B | 4 bytes of packet data and CRC value |
RDFO | Read Word | 0x00000000 | Read the receive FIFO occupancy (no further receive packets to process) |
Register | Access | Value | Activity |
---|---|---|---|
Power-up Read of Register Values | |||
ISR | Read Word | 0x01D00000 | Read interrupt status register (indicates transmit reset complete and receive reset complete) |
ISR | Write Word | 0xFFFFFFFF | Write to clear reset done interrupt bits |
ISR | Read Word | 0x00000000 | Read interrupt status register |
IER | Read Word | 0x00000000 | Read interrupt enable register |
TDFV | Read Word | 0x000001FC | Read the transmit FIFO vacancy |
RDFO | Read Word | 0x00000000 | Read the receive FIFO occupancy |
Transmit a Packet in Cut-Through Mode | |||
IER | Write Word | 0x0C000000 | Enable transmit complete and receive complete interrupts |
TDR | Write Word | 0x00000002 |
Transmit Destination address (0x2 = destination device address is 2) |
TDFD | Write Word | 0xFFFFFFFF | 4 bytes of data |
TDFD | Write Word | 0x12345678 | 4 bytes of data |
TDFD | Write Word | 0x00010103 | 4 bytes of data |
TDFD | Write Word | 0x08090A0B | 4 bytes of data |
TDFD | Write Word | 0x10111213 | 4 bytes of data |
TDFD | Write Word | 0x18191A1B | 4 bytes of data |
TDFD | Write Word | 0x20212223 | 4 bytes of data |
TDFD | Write Word | 0x28292A2B | 4 bytes of data |
TLR | Write Word | 0x00000020 | Transmit length (0x20 = 32bytes), this starts transmission |
ISR | Read Word | 0x08000000 | A typical value after TX Complete is indicated by interrupt |
ISR | Write Word | 0xFFFFFFFF | Write to clear transmit complete interrupt bits |
ISR | Read Word | 0x00000000 | Read interrupt status register |
TDFV | Read Word | 0x000001FC | Read the transmit FIFO vacancy |
Receive a Packet in Cut-Through Mode | |||
IER | Write Word | 0x04100000 | Enable receive complete and Receive FIFO Programmable Full (RFPF) threshold interrupts |
ISR | Read Word | 0x00100000 |
A typical value after RFPF is indicated by interrupt |
ISR | Write Word | 0x00100000 | Reset RFPF interrupt |
RLR | Read Word | 0x80000010 |
Read the receive FIFO occupancy. If bit-31 is 1, it indicates that a partial packet is available. 0x80000010 = 16 bytes |
RDFD | Read Word | 0xFFFFFFFF |
Started reading partial packet. 4 bytes of data |
RDFD | Read Word | 0x21031987 | 4 bytes of data |
RDFD | Read Word | xAEF10011 | 4 bytes of data |
RDFD | Read Word | 0x27071985 | 4 bytes of data |
ISR | Read Word | 0x04000000 | A typical value after RX complete is indicated by interrupt |
ISR | Write Word | 0x04000000 | Reset RX complete interrupt |
RLR | Read Word | 0x00000020 | Receive length (0x20 = 32 bytes) indicates number of bytes to be read |
RDR | Read Word | 0x00000002 | Receive Destination address (0x2 = destination device address is 2) |
RDFD | Read Word | 0x10101021 |
Reading remaining 16 bytes. 4 bytes of data |
RDFD | Read Word | 0x21041987 | 4 bytes of data |
RDFD | Read Word | xAEF10011 | 4 bytes of data |
RDFD | Read Word | 0x27061985 | 4 bytes of data |
ISR | Read Word | 0x04000000 | A typical value after RX complete is indicated by interrupt |
ISR | Write Word | 0x04000000 | Reset RX complete interrupt |
RLR | Read Word | 0x80000014 |
Read the receive FIFO occupancy. If bit 31 is 0, it indicates that a full packet is available. 0x80000014 = 20 bytes |
RDR | Read Word | 0x00000003 | Receive Destination address (0x3 = destination device address is 3) |
RDFD | Read Word | 0x10101010 |
Reading packet. 4 bytes of data |
RDFD | Read Word | 0x20041981 | 4 bytes of data |
RDFD | Read Word | xAEF1001F | 4 bytes of data |
RDFD | Read Word | 0x21021958 | 4 bytes of data |
RDFD | Read Word | 0x0E0CB231 | 4 bytes of data |
RDFO | Read Word | 0x00000000 | Read the receive FIFO occupancy |