The LogiCORE IP AXI4-Stream FIFO core allows memory mapped access to an AXI4-Stream interface. The core can be used to interface to AXI4-Stream IPs, similar to the AXI4-Stream FIFO core, without having to use a full DMA solution.
The principal operation of this core allows the write or read of data packets to or from a device without concern over the AXI4-Stream interface signaling. You can easily manage the AXI4-Stream interfaces as they are transparent.