AXI4-Stream Reset Register (SRR) - 4.3 English

AXI4-Stream FIFO LogiCORE IP Product Guide (PG080)

Document ID
PG080
Release Date
2023-11-08
Version
4.3 English

The AXI4-Stream Register shown in the following figure is not an actual register. It is a write-only address, which when written with a specific value, generates an immediate reset for the entire core and driving a reset on the external outputs, s2mm_prmry_reset_out_n, mm2s_prmry_reset_out_n, and mm2s_cntrl_reset_out_n, which can be used to reset the core on the other end of the AXI4-Stream.

Figure 1. AXI4-Stream Reset Register (Offset 0x28)
Table 1. AXI4-Stream Reset Register (Offset 0x28)
Bit(s) Name Core Access Reset Value Description
31:0 Reset Key Write N/A

Reset Write Value :

"0x000000A5" - Generate a reset.

Others - No effect.