Simulate the Core - 12.0 English

Aurora 64B/66B LogiCORE IP Product Guide (PG074)

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12.0 English
  1. Run simulation from the Vivado IDE. Select the simulation type to launch.
  2. QuestaSim launches and compiles the modules.
  3. The file loads automatically and populates AXI4-Stream signals.
  4. Allow the simulation to run. This might take some time.
    1. Initially lane up is asserted.
    2. Channel up is then asserted and the data transfer begins.
    3. Data transfer from all flow control interfaces now begins.
    4. Frame checker continuously checks the received data and reports for any data mismatch.
  5. A 'TEST PASS' or 'TEST FAIL' status is printed on the QuestaSim console providing the status of the test.