Simplex Aurora 64B/66B cores have no sideband connection and use timers
to declare that the partner is out of initialization and, thus, ready for data transfer.
Simplex TX/RX cores have both transmit and receive portions of the transceiver
configured to operate independently. However, the simplex TX/RX cores have reset and
pma_init signals in common between the transmit
and receive path of the core.
The BACKWARD_COMP_MODE3 TX/RX_simplex core
parameter can be used to prevent unintentional hot plug events from inhibiting
channel-up assertion. This parameter is available in the <user_component_name>_core.v file and is available for all core
configurations.
- BACKWARD_COMP_MODE3 = 0 clears the hot plug counter only on reception of CC characters
- BACKWARD_COMP_MODE3 = 1 clears the hot plug counter on reception of
any valid BTF charactersRecommended: Follow the Reset Sequence given in Chapter 3.