The following figure shows the clocking architecture in the Aurora 64B/66B core for GTX, GTH, or GTY transceivers.
The following paragraphs describe connecting user_clk, sync_clk, and tx_out_clk.
The Aurora 64B/66B cores use three phase-locked
parallel clocks. The first is user_clk, which
synchronizes all signals between the core and the user application. All logic touching
the core must be driven by user_clk, which in turn must
be the output of a global clock buffer (BUFG).
The user_clk signal is used to drive the
txusrclk2 port of the serial transceiver. The
tx_out_clk is selected such that the data rate of the parallel side
of the module matches the data rate of the serial side of the module, taking into
account 64B/66B encoding and decoding.
The third phase-locked parallel clock is sync_clk. This clock is used to drive txusrclk port of the serial transceiver and it must come
from a BUFG. It is also connected to the Aurora 64B/66B core to drive the internal
synchronization logic of the serial transceiver.
To make it easier to use the two parallel clocks, a
clock module is provided in a subdirectory called clock_module under example_design/support
or under src based on shared logic settings. The ports
for this module are described in Table 1. If
the clock module is used, the mmcm_not_locked signal
should connect to the mmcm_not_locked output of the
clock module; tx_out_clk should connect to the clock
module clk port, and pll_lock should connect to the clock module pll_not_locked port. If the clock module is not used, connect the mmcm_not_locked signal to the inverse of the locked signal from any PLL used to generate either of the
parallel clocks. If tx_out_clk is used as the PLL
source clock, use the pll_lock signal to hold the PLLs in reset during stabilization.
The txusrclk could be unreliable during the assertion
of pma_init. Hence, the core uses a stable clock
(init_clk) for MMCM synchronization. Using a stable
clock to sample, adds more robustness to the link.
If MMCM is used to generate a stable clock (init_clk), pma_init needs
to be applied to the Aurora 64B/66B core until the MMCM lock is established. This
ensures that the core remains in a known state before a stable clock is available for
the core.