•LUTs: Slice LUTs utilization for 64-bit Data Width
•FFs: Slice Flip-Flops utilization for 64-bit Data Width
•base_LUTs: Baseline LUTs, independent of data width
•base_FFs: Baseline FFs, independent of data width
•LUTs_per_bit: LUTs_for_width_DW = base_LUTs + (DW * LUTs_per_bit)
•FFs_per_bit: FFs_for_width_DW = base_FFs + (DW * FFs_per_bit)
•RO_LUTs, RO_FFs: All SI and MI Read-Only (64-bit data width)
•WO_LUTs, WO_FFs: All SI and MI Write-Only (64-bit data width)
Utilization (LUTs) for crossbar with RW_SI and RW_MI read/write slots, RO_SI and RO_MI read-only slots and WO_SI and WO_MI write-only slots (64-bit data width) is approximately (LUTs[(RW_SI + RO_SI), (RW_MI + RO_MI)] * RO_LUTs%) + (LUTs[(RW_SI + WO_SI), (RW_MI + WO_MI)] * WO_LUTs%); similarly for FFs. (SAMD Crossbar shares no resources between read and write pathways; thus RO% + WO% always = 100%.)
Table 2-16: AXI Crossbar Resource Utilization: SAMD, AXI4 Protocol
NUM SI
|
NUM MI
|
1
|
2
|
3
|
4
|
5
|
6
|
8
|
10
|
12
|
16
|
1
|
|
410:530
(220:270 + dw* 3.0:4.0)
R = 74:75%
W =26:25%
|
530:700
(270:310 + dw* 4.0:6.0)
R = 75:79%
W = 25:21%
|
660:860
(340:350 + dw* 5.0:8.0)
R = 75:82%
W = 25:18%
|
850:1030
(310:390 + dw* 8.4:10.0)
R = 78:82%
W = 22:18%
|
970:1190
(370:420 + dw* 9.4:12.0)
R = 78:84%
W = 22:16%
|
1210:1520
(400:500 + dw* 12.7:16.0)
R = 78:85%
W = 22:15%
|
1670:1850
(710:570 + dw* 15.0:20.0)
R = 80:86%
W = 20:14%
|
1770:2180
(550:640 + dw* 19.1:24.0)
R = 78:87%
W = 22:13%
|
2550:2830
(1080:790 + dw* 23.0:32.0)
R = 80:88%
W = 20:12%
|
2
|
770:540
(610:410 + dw* 2.6:2.0)
R = 52:60%
W =48:40%
|
1050:740
(720:490 + dw* 5.1:4.0)
R = 55:66%
W =45:34%
|
1260:930
(830:550 + dw* 6.8:6.0)
R = 55:70%
W = 45:30%
|
1550:1140
(1020:620 + dw* 8.2:8.0)
R = 55:72%
W = 45:28%
|
|
|
2590:1900
(1190:880 + dw* 21.9:16.0)
R = 57:76%
W = 43:24%
|
|
|
5410:3420
(2930:1370 + dw* 38.7:32.0)
R = 61:80%
W = 39:20%
|
3
|
1130:630
(890:510 + dw* 3.6:2.0)
R = 50:58%
W =50:42%
|
1590:860
(1120:600 + dw* 7.3:4.0)
R = 52:64%
W =48:36%
|
|
|
|
|
|
|
|
|
4
|
1380:710
(1120:590 + dw* 4.1:2.0)
R = 51:56%
W =49:44%
|
1920:950
(1390:690 + dw* 8.3:4.0)
R = 53:62%
W =47:38%
|
|
2570:1380
(1770:870 + dw* 12.5:8.0)
R = 51:67%
W = 49:33%
|
|
|
4220:2210
(1910:1190 + dw* 36.0:16.0)
R = 53:72%
W = 47:28%
|
|
|
|
5
|
1940:810
(1580:680 + dw* 5.6:2.0)
R = 48:55%
W =52:45%
|
|
|
|
|
|
|
|
|
|
6
|
2110:890
(1620:760 + dw* 7.7:2.0)
R = 49:54%
W =51:46%
|
|
|
|
|
|
|
|
|
|
8
|
3120:1047
(2467:919 + dw* 10.2:2.0)
R = 47:52%
W =53:48%
|
4320:1340
(3010:1080 + dw* 20.5:4.0)
R = 47:56%
W =53:44%
|
|
5850:1850
(3790:1340 + dw* 32.3:8.0)
R = 44:62%
W = 56:38%
|
|
|
9610:2800
(4030:1770 + dw* 87.2:16.0)
R = 42:67%
W = 58:33%
|
|
|
|
10
|
3960:1220
(3150:1090 + dw* 12.8:2.0)
R = 46:52%
W =54:48%
|
|
|
|
|
|
|
|
|
|
12
|
4720:1380
(3760:1250 + dw* 14.9:2.0)
R = 46:50%
W =54:50%
|
|
|
|
|
|
|
|
|
|
16
|
6320:1700
(5070:1570 + dw* 19.5:2.0)
R = 46:49%
W =54:51%
|
8370:2100
(5900:1840 + dw* 38.7:4.0)
R = 46:52%
W =54:48%
|
|
|
|
|
|
|
|
|