AXI4 or AXI3 master devices can be connected through an AXI Protocol Converter core to an AXI4-Lite slave to convert either single-beat transfers or multi-beat bursts issued by the master. In this mode, the Protocol Converter acts as a single-acceptance slave, in which there is only one outstanding SI transaction active at a time.
The transaction ID (awid or arid )
received at the SI is stripped and stored in the conversion block,
and retrieved during response transfers as BID or RID.
By default, the AXI4-Lite protocol conversion converts AXI4/AXI3 bursts into a sequence of single-beat transactions for AXI4-Lite slaves. When directly instantiating the Protocol Converter IP core, the TRANSLATION_MODE parameter can be set to 0 (Unprotected) to save resources when AXI4-Lite slaves are accessed only by well-behaved masters that issue only single-beat transactions.
In Unprotected mode, Endpoint masters having wider data width than the target AXI4-Lite slave should issue only transactions in which the data transfer size (according to AWSIZE or ARSIZE) is no larger than the data width of the targeted AXI4-Lite slave. This is to ensure that an intervening AXI Data Width Converter does not generate a multi-beat burst transfer while downsizing. The following figure illustrates the "unprotected" AXI4-Lite conversion logic.