Address Width - 2.1 English

•Description: Number of address bits representing the address space (in bytes) covered by each address range of each MI slot.

•Format/Range: For AXI4 or AXI3: Integer (12-64); for AXI4-Lite: Integer (1-64)

•Default Value: 12 for range A00, otherwise 0 (unused)

Figure 4-9: AXI Crossbar Core – Connectivity Tab
X-Ref Target - Figure 4-9

Address Width - 2.1 English - PG059