Address Range - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

In XPS, AXI Interconnect v1.x core used BASE_ADDR and HIGH_ADDR to represent all address ranges.

In AXI Interconnect v2.1 core, set Mmm_Aaa_ADDR_WIDTH to the number of address bits corresponding to each range, which is log2(HIGH_ADDR - BASE_ADDR + 1).