AXI Clock Converter - 2.1 English - PG059

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

Common Configuration:

ID Width: 4 (AXI4 and AXI3 only)

Address Width: 32

User Width: 0

Read/Write

Note:   The specifications in these tables are derived by implementing the configured IP in isolation, characterizing clock frequency based on static timing results, and then applying a 10% guardband below the highest constrained clock frequency that meets timing.

Table 2-10:      AXI Clock Converter Performance

Protocol

Clock Conversion

Data Width

Performance (MHz)

Virtex-7 and Kintex-7 (and its Zynq-7000 derivatives), Speed Grade -2

Kintex UltraScale, Speed Grade -2

Artix-7 (and its Zynq-7000 derivatives), Speed Grade -2

AXI4 or AXI3

Sync or async

32-1024

350

400

270

AXI4-Lite

Sync or async

32-1024

 

350

400

350