The following table shows the client clock
rates for clk_in and recclk_in for all supported line
rates at which the CPRI
AMD LogiCORE™
IP core operates.
| Line Rate (Mb/s) | Client Clock Rate (MHz) | |||
|---|---|---|---|---|
| 16-bit Datapath | 32-bit Datapath | 64-bit Datapath | ||
| clk_in and recclk_in | clk_in and recclk_in | clk_in | recclk_in | |
| 614.4 | 30.72 | 15.36 | 7.68 | 15.36 |
| 1,228.8 | 61.44 | 30.72 | 15.36 | 30.72 |
| 2,457.6 | 122.88 | 61.44 | 30.72 | 61.44 |
| 3,072.0 | 153.6 | 76.8 | 38.4 | 76.8 |
| 4,915.2 | 245.76 | 122.88 | 61.44 | 122.88 |
| 6,144.0 | 307.2 | 153.6 | 76.8 | 153.6 |
| 8,110.08 | 245.76 | 122.88 | 122.88 | |
| 9,830.4 | 245.76 | 122.88 | 245.76 | |
| 10,137.6 | 307.2 | 153.6 | 153.6 | |
| 12,165.12 | 368.64 | 184.32 | 184.32 | |
| 24,330.24 | 368.64 | 368.64 | ||
Note: 64-bit cores running 8B10B line rates have different frequencies
for
clk_in and recclk_in because of limitations in data
width inside the GT at 8B10B rates.