The following example shows the result of running Block Automation. The Versal adaptive SoC Transceiver GT Quad can be created with the correct settings required for the selected CPRI IP core(s). The CPRI IP core(s) are connected to the Versal adaptive SoC Transceiver GT Quad.
The remaining unconnected ports, such as ref_clock, core_clk, resets etc.,
need to be connected manually. For an example of how to connect the remaining ports, generate
the CPRI IP example design (see Example Design) in Vivado and use this as a
reference.
The following figure shows the result of running Block Automation on two CPRI IP cores with default settings.
Figure 1. Block Automation Example on Two CPRI IP Cores