The VSEC Header register (described in Table: VSEC Header Register ) provides a unique (within a given vendor) identifier for the layout and contents of the VSEC structure, as well as its revision and length.
VSEC Header register is part of the PCI Express Hard Block which contains Loopback Control registers. For more information about Loopback Control Registers, see the AMD Defined Vendor Specific Capability section in the 7 Series FPGAs Integrated Block for PCI Express Product Guide (PG054) [Ref 2] .