The VSEC Header Register 2 (described in Table: VSEC Header Register 2 ) provides a unique (within a given vendor) identifier for the layout and contents of the VSEC structure, as well as its revision and length. VSEC Header Register 2 is part of the AXI Memory Mapped to PCI Express core that contains AXI Base Address Translation Configuration Registers which start immediately after VSEC Header Register 2 (Offset 0x208).
This register is only included if C_INCLUDE_BAR_OFFSET_REG = 1.