The VSEC Capability register (described in
Table: VSEC Capability Register
) allows the memory space of the core to appear as though it is a part of the underlying core configuration space. The VSEC is inserted immediately following the last enhanced capability structure in the underlying block. VSEC is defined in §7.18 of the
PCI Express Base Specification, v1.1
(§7.19 of v2.0)
[Ref 8]
.
Table 2-6:
VSEC Capability Register
|
Bits
|
Name
|
Core Access
|
Reset Value
|
Description
|
|
15:0
|
VSEC Capability ID
|
RO
|
0x000B
|
PCI-SIG
®
defined ID identifying this enhanced capability as a vendor-specific capability. Hardcoded to 0x000B.
|
|
19:16
|
Capability Version
|
RO
|
0x1
|
Version of this capability structure. Hardcoded to 0x1.
|
|
31:20
|
Next Capability Offset
|
RO
|
0x200
|
Offset to next capability. Hardcoded to 0x0200.
|