Using a Link Analyzer to Debug Device Recognition Issues - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

Document ID
PG055
Release Date
2023-11-24
Version
2.9 English

In cases where the link is up (user_link_up = 1), but the device is not recognized by the system, a link analyzer can help solve the issue. It is likely the FPGA is not responding properly to some type of access. The link view can be used to analyze the traffic and see if anything looks out of place.

To focus on the issue, it might be necessary to try different triggers. Here are some trigger examples:

Trigger on the first INIT_FC1 and/or UPDATE_FC in either direction. This allows the analyzer to begin capture after link up.

The first TLP normally transmitted to an Endpoint is the Set Slot Power Limit Message. This usually occurs before Configuration traffic begins. This might be a good trigger point.

Trigger on Configuration TLPs.

Trigger on Memory Read or Memory Write TLPs.