A device for PCIe might not be capable of satisfying a specific read request. For example, the read request targets an unsupported address for PCIe causing the completer to return a completion TLP with a completion status of 0b001 - Unsupported Request. The completer can also return a completion TLP with a completion status that is reserved according to the 2.1 PCIe Specification, which must be treated as an unsupported request status. When the slave bridge receives an unsupported request response, the Slave Unsupported Request (SUR) interrupt is asserted and the SLVERR response is asserted with arbitrary data on the memory mapped AXI4 bus.