Root Port MSI Base Register 1 (Offset 0x14C) - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

Document ID
PG055
Release Date
2023-11-24
Version
2.9 English

The Root Port MSI Base register contains the upper 32-bits of the 64-bit MSI address (described in Table: Root Port MSI Base Register 1 ).

For EP configurations, read returns zero.

Table 2-15: Root Port MSI Base Register 1

Bits

Name

Core Access

Reset
Value

Description

31:0

MSI Base

RW

0

4Kb-aligned address for MSI interrupts. In case of 32-bit MSI,

it returns 0 but captures the upper 32-bits of the MSI address in case of 64-bit MSI.