The AXI Memory Mapped to PCI Express core is designed to be used with the Processing System Reset module for generation of the axi_areset input. When using the Vivado IP integrator to build a system, it is best to connect the perstn pin of the host connector for PCIe to the Aux_Reset_In port of the Processing System Reset module. The bridge does not use perstn directly. Also, the mmcm_lock output must be connected to the dcm_locked input of the Processing System Reset module to make sure that axi_aresetn is held active for 16 clocks after mmcm_lock becomes active. See This Figure .
Note: Be sure to set the correct polarity on the aux_reset_in signal of the proc_sys_reset IP block. when PERSTN is active-Low, set the parameter as follows:
PARAMETER C_AUX_RESET_HIGH = 0
