Reference Clock for PCIe Frequency Value - 2.9 English

The refclk input used by the serial transceiver for PCIe must be 100 MHz, 125 MHz, or 250 MHz for 7 series and Zynq 7000 SoC device configurations . The C_REF_CLK_FREQ parameter is used to set this value, as defined in Table: Top-Level Parameters . The refclk input must be fed in from a clock source that is external to the chip.