Legacy Interrupts - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

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2.9 English

The bridge supports legacy interrupts for PCI if selected by the C_INTERRUPT_PIN parameter. (Can only be set to 1 when C_INCLUDE_RC = 0.) A value of 1 selects INTA, as defined in Table: Top-Level Parameters . If a legacy interrupt for PCI support is selected and the msi_enable output pin indicates that the bridge has endpoint MSI functionality disabled
( MSI_enable = 0), the intx_msi_request pin is defined as INTX . When the INTX pin goes High, an assert INTA message is sent. When the INTX pin goes Low, a deassert INTA message is sent. The interrupts needs to be synchronized to axi_aclk_out . These messages are defined in the PCI 2.1 specification. The intx_msi_request pin input is valid only when the bridge is operating in Endpoint mode (C_INCLUDE_RC=0).