Intercept and Decode Incoming MSI Packet - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

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2.9 English

Indicates that a received Memory Write packet with an address equal to the value of Root Port MSI Base register will be decoded and reported as an MSI interrupt in the Root Port Interrupt FIFO register.