Features - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

Document ID
Release Date
2.9 English

Zynq 7000 SoC, Virtex 7, Kintex 7, and Artix 7 FPGA Integrated Blocks for PCI Express (3)

Maximum Payload Size (MPS) up to 256 bytes

Multiple Vector Messaged Signaled Interrupts (MSIs)

Legacy interrupt support

Memory-mapped AXI4 access to PCIe ® space

PCIe access to memory-mapped AXI4 space

Tracks and manages Transaction Layer Packets (TLPs) completion processing

Detects and indicates error conditions with interrupts

Optimal AXI4 pipeline support for enhanced performance

Compliant with Advanced RISC Machine (Arm ® ) Advanced Microcontroller Bus Architecture 4 (AMBA ® ) AXI4 specification

Supports up to three PCIe 32-bit or 64-bit PCIe Base Address Registers (BARs) as Endpoint

Supports a single PCIe 32-bit or 64-bit BAR as Root Port

LogiCORE IP Facts Table

Core Specifics

Supported Device Family

AMD Zynq 7000 SoC, AMD Virtex 7,

AMD Kintex 7, and AMD Artix 7 (3)

Supported User Interfaces



Performance and Resource Utilization web page

Provided with Core

Design Files

VHDL and Verilog

Example Design


Test Bench


Constraints File


Simulation Model

Not Provided

S/W Driver

Standalone and Linux

Tested Design Flows (1)

Design Entry

Vivado Design Suite


For supported simulators, see the

Vivado Design Suite User Guide: Release Notes, Installation, and Licensing.


Vivado synthesis


Release Notes and Known Issues

Master Answer Record: 54646

All Vivado IP Change Logs

Master Vivado IP Change Logs: 72775

Support web page


1. For the supported versions of third-party tools, see the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing .

2. Standalone driver details can be found in the Vitis directory (<install_directory>/Vitis/<release>/data/embeddedsw/doc/xilinx_drivers.htm). Linux OS and driver support information is available from the Wiki page .

3. E xcept for XC7VX485T, XC7V585T, and XC7V2000T, Virtex 7 devices are not supported. XA7A12T, XC7A12T, XA7A15T, XC7A15T, XA7A25T, and XC7A25T devices are not supported due to limited available logic cells within them.