Addressing Checks - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

Document ID
PG055
Release Date
2023-11-24
Version
2.9 English

When setting the following parameters for PCIe address mapping, C_PCIEBAR2AXIBAR_n and C_PCIEBAR_LEN_n , be sure these are set to allow for the 32-bit addressing space on the AXI system. For example, the following setting is illegal and results in an invalid AXI address.

C_PCIEBAR2AXIBAR_0 = 0xFFFF_0000

C_PCIEBAR_LEN_0 = 23

Also, check for a larger value on C_PCIEBAR_LEN_n compared to the value assigned to parameter, C_PCIEBAR2AXIBAR_n. For example, the following parameter settings.

C_PCIEBAR2AXIBAR_0 = 0xFFFF_E000

C_PCIEBAR_LEN_0 = 20

To keep the AXIBAR upper address bits as 0xFFFF_E000 (to reference bits [31:13]), the C_PCIEBAR_LEN_0 parameter must be set to 13 .