Abnormal Configuration Transaction Termination Responses - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

Document ID
PG055
Release Date
2023-11-24
Version
2.9 English

Responses on AXI4-Lite to abnormal terminations to configuration transactions are shown in Table: Responses of AXI Memory Mapped to PCI Express to Abnormal Configuration Terminations .

Table 3-8: Responses of AXI Memory Mapped to PCI Express to Abnormal Configuration Terminations

Transfer Type

Abnormal Condition

Bridge Response

Config Read or Write

Bus number not in the range of primary bus number through subordinate bus number.

SLVERR response is asserted.

Config Read or Write

Valid bus number and completion timeout occurs.

SLVERR response is asserted.

Config Read or Write

Completion timeout.

SLVERR response is asserted.

Config Write

Bus number in the range of secondary bus number through subordinate bus number and UR is returned.

SLVERR response is asserted.