AXI Base Address Registers - 2.9 English

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.9 LogiCORE IP Product Guide (PG055)

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2.9 English

The AXI Base Address Registers (BARs) screen shown in This Figure sets the AXI base address registers and the translation between AXI Memory space and PCI Express Memory space. Each BAR has a Base Address, High Address, and translation field which can be configured through the Vivado IDE.

Figure 4-6: AXI Base Address Registers

X-Ref Target - Figure 4-6